Feb 16, 2010 10:56 AM
How to detect code exceeding DSP bandwidth (debugging tip)
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It can be difficult to tell if your DSP code is taking longer to run than the available clock cycles between samples. The DSP56364 ignores a second ESAI interrupt if it is still processing the first one, causing it to drop samples. In my case, the effect pretty much worked, but the missed samples added a small high-frequency signal.
I added the following code to the beginning of the receive exception interrupt (esai_rxe_isr) to detect receive overruns. It uses one of the debug memory locations as a counter, so it's unobtrusive. The actual number of overruns isn't important - just the fact that the number is changing.
; Check for receive overrun
move x:M_SAISR,a
jclr #7,a,_no_receive_overrun
move x:Debug_Read_from_DSP_4,a0
inc a
nop
move a0,x:Debug_Read_from_DSP_4
_no_receive_overrun
That's a great tip, thanks. I did something stupid one time and suspected this was happening but didn't know how to prove it.
And congrats on doing something complicated enough to max out your DSP cycles!
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